
queen3:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004f8 <_init>:
  4004f8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004fc:	910003fd 	mov	x29, sp
  400500:	94000036 	bl	4005d8 <call_weak_fn>
  400504:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400508:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400510 <.plt>:
  400510:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400514:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf264>
  400518:	f947fe11 	ldr	x17, [x16, #4088]
  40051c:	913fe210 	add	x16, x16, #0xff8
  400520:	d61f0220 	br	x17
  400524:	d503201f 	nop
  400528:	d503201f 	nop
  40052c:	d503201f 	nop

0000000000400530 <__libc_start_main@plt>:
  400530:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400534:	f9400211 	ldr	x17, [x16]
  400538:	91000210 	add	x16, x16, #0x0
  40053c:	d61f0220 	br	x17

0000000000400540 <__gmon_start__@plt>:
  400540:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400544:	f9400611 	ldr	x17, [x16, #8]
  400548:	91002210 	add	x16, x16, #0x8
  40054c:	d61f0220 	br	x17

0000000000400550 <abort@plt>:
  400550:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400554:	f9400a11 	ldr	x17, [x16, #16]
  400558:	91004210 	add	x16, x16, #0x10
  40055c:	d61f0220 	br	x17

0000000000400560 <puts@plt>:
  400560:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400564:	f9400e11 	ldr	x17, [x16, #24]
  400568:	91006210 	add	x16, x16, #0x18
  40056c:	d61f0220 	br	x17

0000000000400570 <printf@plt>:
  400570:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400574:	f9401211 	ldr	x17, [x16, #32]
  400578:	91008210 	add	x16, x16, #0x20
  40057c:	d61f0220 	br	x17

0000000000400580 <putchar@plt>:
  400580:	b0000090 	adrp	x16, 411000 <__libc_start_main@GLIBC_2.17>
  400584:	f9401611 	ldr	x17, [x16, #40]
  400588:	9100a210 	add	x16, x16, #0x28
  40058c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400590 <_start>:
  400590:	d280001d 	mov	x29, #0x0                   	// #0
  400594:	d280001e 	mov	x30, #0x0                   	// #0
  400598:	aa0003e5 	mov	x5, x0
  40059c:	f94003e1 	ldr	x1, [sp]
  4005a0:	910023e2 	add	x2, sp, #0x8
  4005a4:	910003e6 	mov	x6, sp
  4005a8:	580000c0 	ldr	x0, 4005c0 <_start+0x30>
  4005ac:	580000e3 	ldr	x3, 4005c8 <_start+0x38>
  4005b0:	58000104 	ldr	x4, 4005d0 <_start+0x40>
  4005b4:	97ffffdf 	bl	400530 <__libc_start_main@plt>
  4005b8:	97ffffe6 	bl	400550 <abort@plt>
  4005bc:	00000000 	.inst	0x00000000 ; undefined
  4005c0:	0040068c 	.word	0x0040068c
  4005c4:	00000000 	.word	0x00000000
  4005c8:	00400c10 	.word	0x00400c10
  4005cc:	00000000 	.word	0x00000000
  4005d0:	00400c90 	.word	0x00400c90
  4005d4:	00000000 	.word	0x00000000

00000000004005d8 <call_weak_fn>:
  4005d8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf264>
  4005dc:	f947f000 	ldr	x0, [x0, #4064]
  4005e0:	b4000040 	cbz	x0, 4005e8 <call_weak_fn+0x10>
  4005e4:	17ffffd7 	b	400540 <__gmon_start__@plt>
  4005e8:	d65f03c0 	ret
  4005ec:	00000000 	.inst	0x00000000 ; undefined

00000000004005f0 <deregister_tm_clones>:
  4005f0:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4005f4:	91010000 	add	x0, x0, #0x40
  4005f8:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  4005fc:	91010021 	add	x1, x1, #0x40
  400600:	eb00003f 	cmp	x1, x0
  400604:	540000a0 	b.eq	400618 <deregister_tm_clones+0x28>  // b.none
  400608:	90000001 	adrp	x1, 400000 <_init-0x4f8>
  40060c:	f9465821 	ldr	x1, [x1, #3248]
  400610:	b4000041 	cbz	x1, 400618 <deregister_tm_clones+0x28>
  400614:	d61f0020 	br	x1
  400618:	d65f03c0 	ret
  40061c:	d503201f 	nop

0000000000400620 <register_tm_clones>:
  400620:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400624:	91010000 	add	x0, x0, #0x40
  400628:	b0000081 	adrp	x1, 411000 <__libc_start_main@GLIBC_2.17>
  40062c:	91010021 	add	x1, x1, #0x40
  400630:	cb000021 	sub	x1, x1, x0
  400634:	9343fc21 	asr	x1, x1, #3
  400638:	8b41fc21 	add	x1, x1, x1, lsr #63
  40063c:	9341fc21 	asr	x1, x1, #1
  400640:	b40000a1 	cbz	x1, 400654 <register_tm_clones+0x34>
  400644:	90000002 	adrp	x2, 400000 <_init-0x4f8>
  400648:	f9465c42 	ldr	x2, [x2, #3256]
  40064c:	b4000042 	cbz	x2, 400654 <register_tm_clones+0x34>
  400650:	d61f0040 	br	x2
  400654:	d65f03c0 	ret

0000000000400658 <__do_global_dtors_aux>:
  400658:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40065c:	910003fd 	mov	x29, sp
  400660:	f9000bf3 	str	x19, [sp, #16]
  400664:	b0000093 	adrp	x19, 411000 <__libc_start_main@GLIBC_2.17>
  400668:	39410260 	ldrb	w0, [x19, #64]
  40066c:	35000080 	cbnz	w0, 40067c <__do_global_dtors_aux+0x24>
  400670:	97ffffe0 	bl	4005f0 <deregister_tm_clones>
  400674:	52800020 	mov	w0, #0x1                   	// #1
  400678:	39010260 	strb	w0, [x19, #64]
  40067c:	f9400bf3 	ldr	x19, [sp, #16]
  400680:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400684:	d65f03c0 	ret

0000000000400688 <frame_dummy>:
  400688:	17ffffe6 	b	400620 <register_tm_clones>

000000000040068c <main>:
  40068c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400690:	910003fd 	mov	x29, sp
  400694:	52800020 	mov	w0, #0x1                   	// #1
  400698:	b90023a0 	str	w0, [x29, #32]
  40069c:	b9001fbf 	str	wzr, [x29, #28]
  4006a0:	52800020 	mov	w0, #0x1                   	// #1
  4006a4:	b9002fa0 	str	w0, [x29, #44]
  4006a8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4006ac:	91012000 	add	x0, x0, #0x48
  4006b0:	52800021 	mov	w1, #0x1                   	// #1
  4006b4:	b9000401 	str	w1, [x0, #4]
  4006b8:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  4006bc:	91330000 	add	x0, x0, #0xcc0
  4006c0:	97ffffa8 	bl	400560 <puts@plt>
  4006c4:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4006c8:	91012000 	add	x0, x0, #0x48
  4006cc:	b9802fa1 	ldrsw	x1, [x29, #44]
  4006d0:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  4006d4:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  4006d8:	9133c000 	add	x0, x0, #0xcf0
  4006dc:	2a0103e3 	mov	w3, w1
  4006e0:	b9402fa2 	ldr	w2, [x29, #44]
  4006e4:	52800301 	mov	w1, #0x18                  	// #24
  4006e8:	97ffffa2 	bl	400570 <printf@plt>
  4006ec:	14000141 	b	400bf0 <main+0x564>
  4006f0:	52800020 	mov	w0, #0x1                   	// #1
  4006f4:	b90027a0 	str	w0, [x29, #36]
  4006f8:	52800020 	mov	w0, #0x1                   	// #1
  4006fc:	b9002ba0 	str	w0, [x29, #40]
  400700:	1400001d 	b	400774 <main+0xe8>
  400704:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400708:	91012000 	add	x0, x0, #0x48
  40070c:	b9802ba1 	ldrsw	x1, [x29, #40]
  400710:	b8617802 	ldr	w2, [x0, x1, lsl #2]
  400714:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400718:	91012000 	add	x0, x0, #0x48
  40071c:	b9802fa1 	ldrsw	x1, [x29, #44]
  400720:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400724:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400728:	91342000 	add	x0, x0, #0xd08
  40072c:	2a0103e4 	mov	w4, w1
  400730:	b9402fa3 	ldr	w3, [x29, #44]
  400734:	b9402ba1 	ldr	w1, [x29, #40]
  400738:	97ffff8e 	bl	400570 <printf@plt>
  40073c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400740:	91012000 	add	x0, x0, #0x48
  400744:	b9802ba1 	ldrsw	x1, [x29, #40]
  400748:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  40074c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400750:	91012000 	add	x0, x0, #0x48
  400754:	b9802fa2 	ldrsw	x2, [x29, #44]
  400758:	b8627800 	ldr	w0, [x0, x2, lsl #2]
  40075c:	6b00003f 	cmp	w1, w0
  400760:	54000041 	b.ne	400768 <main+0xdc>  // b.any
  400764:	b90027bf 	str	wzr, [x29, #36]
  400768:	b9402ba0 	ldr	w0, [x29, #40]
  40076c:	11000400 	add	w0, w0, #0x1
  400770:	b9002ba0 	str	w0, [x29, #40]
  400774:	b94027a0 	ldr	w0, [x29, #36]
  400778:	7100001f 	cmp	w0, #0x0
  40077c:	540000a0 	b.eq	400790 <main+0x104>  // b.none
  400780:	b9402ba1 	ldr	w1, [x29, #40]
  400784:	b9402fa0 	ldr	w0, [x29, #44]
  400788:	6b00003f 	cmp	w1, w0
  40078c:	54fffbcb 	b.lt	400704 <main+0x78>  // b.tstop
  400790:	52800020 	mov	w0, #0x1                   	// #1
  400794:	b9002ba0 	str	w0, [x29, #40]
  400798:	14000042 	b	4008a0 <main+0x214>
  40079c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4007a0:	91012000 	add	x0, x0, #0x48
  4007a4:	b9802fa1 	ldrsw	x1, [x29, #44]
  4007a8:	b8617807 	ldr	w7, [x0, x1, lsl #2]
  4007ac:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4007b0:	91012000 	add	x0, x0, #0x48
  4007b4:	b9802ba1 	ldrsw	x1, [x29, #40]
  4007b8:	b8617803 	ldr	w3, [x0, x1, lsl #2]
  4007bc:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4007c0:	91012000 	add	x0, x0, #0x48
  4007c4:	b9802ba1 	ldrsw	x1, [x29, #40]
  4007c8:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  4007cc:	b9402ba2 	ldr	w2, [x29, #40]
  4007d0:	b9402fa0 	ldr	w0, [x29, #44]
  4007d4:	4b000040 	sub	w0, w2, w0
  4007d8:	4b000024 	sub	w4, w1, w0
  4007dc:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4007e0:	91012000 	add	x0, x0, #0x48
  4007e4:	b9802ba1 	ldrsw	x1, [x29, #40]
  4007e8:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  4007ec:	b9402ba2 	ldr	w2, [x29, #40]
  4007f0:	b9402fa0 	ldr	w0, [x29, #44]
  4007f4:	4b000040 	sub	w0, w2, w0
  4007f8:	0b000021 	add	w1, w1, w0
  4007fc:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400800:	9134c000 	add	x0, x0, #0xd30
  400804:	2a0103e6 	mov	w6, w1
  400808:	2a0403e5 	mov	w5, w4
  40080c:	2a0303e4 	mov	w4, w3
  400810:	b9402ba3 	ldr	w3, [x29, #40]
  400814:	2a0703e2 	mov	w2, w7
  400818:	b9402fa1 	ldr	w1, [x29, #44]
  40081c:	97ffff55 	bl	400570 <printf@plt>
  400820:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400824:	91012000 	add	x0, x0, #0x48
  400828:	b9802fa1 	ldrsw	x1, [x29, #44]
  40082c:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400830:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400834:	91012000 	add	x0, x0, #0x48
  400838:	b9802ba2 	ldrsw	x2, [x29, #40]
  40083c:	b8627802 	ldr	w2, [x0, x2, lsl #2]
  400840:	b9402ba3 	ldr	w3, [x29, #40]
  400844:	b9402fa0 	ldr	w0, [x29, #44]
  400848:	4b000060 	sub	w0, w3, w0
  40084c:	4b000040 	sub	w0, w2, w0
  400850:	6b00003f 	cmp	w1, w0
  400854:	540001e0 	b.eq	400890 <main+0x204>  // b.none
  400858:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  40085c:	91012000 	add	x0, x0, #0x48
  400860:	b9802fa1 	ldrsw	x1, [x29, #44]
  400864:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400868:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  40086c:	91012000 	add	x0, x0, #0x48
  400870:	b9802ba2 	ldrsw	x2, [x29, #40]
  400874:	b8627802 	ldr	w2, [x0, x2, lsl #2]
  400878:	b9402ba3 	ldr	w3, [x29, #40]
  40087c:	b9402fa0 	ldr	w0, [x29, #44]
  400880:	4b000060 	sub	w0, w3, w0
  400884:	0b000040 	add	w0, w2, w0
  400888:	6b00003f 	cmp	w1, w0
  40088c:	54000041 	b.ne	400894 <main+0x208>  // b.any
  400890:	b90027bf 	str	wzr, [x29, #36]
  400894:	b9402ba0 	ldr	w0, [x29, #40]
  400898:	11000400 	add	w0, w0, #0x1
  40089c:	b9002ba0 	str	w0, [x29, #40]
  4008a0:	b94027a0 	ldr	w0, [x29, #36]
  4008a4:	7100001f 	cmp	w0, #0x0
  4008a8:	540000a0 	b.eq	4008bc <main+0x230>  // b.none
  4008ac:	b9402ba1 	ldr	w1, [x29, #40]
  4008b0:	b9402fa0 	ldr	w0, [x29, #44]
  4008b4:	6b00003f 	cmp	w1, w0
  4008b8:	54fff72b 	b.lt	40079c <main+0x110>  // b.tstop
  4008bc:	b94027a0 	ldr	w0, [x29, #36]
  4008c0:	7100001f 	cmp	w0, #0x0
  4008c4:	54000941 	b.ne	4009ec <main+0x360>  // b.any
  4008c8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4008cc:	91012000 	add	x0, x0, #0x48
  4008d0:	b9802fa1 	ldrsw	x1, [x29, #44]
  4008d4:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  4008d8:	b9402fa0 	ldr	w0, [x29, #44]
  4008dc:	51000402 	sub	w2, w0, #0x1
  4008e0:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4008e4:	91012000 	add	x0, x0, #0x48
  4008e8:	93407c42 	sxtw	x2, w2
  4008ec:	b8627800 	ldr	w0, [x0, x2, lsl #2]
  4008f0:	6b00003f 	cmp	w1, w0
  4008f4:	54000501 	b.ne	400994 <main+0x308>  // b.any
  4008f8:	b9402fa0 	ldr	w0, [x29, #44]
  4008fc:	51000400 	sub	w0, w0, #0x1
  400900:	b9002fa0 	str	w0, [x29, #44]
  400904:	b9402fa0 	ldr	w0, [x29, #44]
  400908:	7100041f 	cmp	w0, #0x1
  40090c:	540001ad 	b.le	400940 <main+0x2b4>
  400910:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400914:	91012000 	add	x0, x0, #0x48
  400918:	b9802fa1 	ldrsw	x1, [x29, #44]
  40091c:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  400920:	7100201f 	cmp	w0, #0x8
  400924:	540000e1 	b.ne	400940 <main+0x2b4>  // b.any
  400928:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  40092c:	91012000 	add	x0, x0, #0x48
  400930:	b9802fa1 	ldrsw	x1, [x29, #44]
  400934:	52800022 	mov	w2, #0x1                   	// #1
  400938:	b8217802 	str	w2, [x0, x1, lsl #2]
  40093c:	14000069 	b	400ae0 <main+0x454>
  400940:	b9402fa0 	ldr	w0, [x29, #44]
  400944:	7100041f 	cmp	w0, #0x1
  400948:	54000121 	b.ne	40096c <main+0x2e0>  // b.any
  40094c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400950:	91012000 	add	x0, x0, #0x48
  400954:	b9802fa1 	ldrsw	x1, [x29, #44]
  400958:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  40095c:	7100201f 	cmp	w0, #0x8
  400960:	54000061 	b.ne	40096c <main+0x2e0>  // b.any
  400964:	b90023bf 	str	wzr, [x29, #32]
  400968:	1400005e 	b	400ae0 <main+0x454>
  40096c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400970:	91012000 	add	x0, x0, #0x48
  400974:	b9802fa1 	ldrsw	x1, [x29, #44]
  400978:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  40097c:	11000402 	add	w2, w0, #0x1
  400980:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400984:	91012000 	add	x0, x0, #0x48
  400988:	b9802fa1 	ldrsw	x1, [x29, #44]
  40098c:	b8217802 	str	w2, [x0, x1, lsl #2]
  400990:	14000054 	b	400ae0 <main+0x454>
  400994:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400998:	91012000 	add	x0, x0, #0x48
  40099c:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009a0:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  4009a4:	7100201f 	cmp	w0, #0x8
  4009a8:	540000e1 	b.ne	4009c4 <main+0x338>  // b.any
  4009ac:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4009b0:	91012000 	add	x0, x0, #0x48
  4009b4:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009b8:	52800022 	mov	w2, #0x1                   	// #1
  4009bc:	b8217802 	str	w2, [x0, x1, lsl #2]
  4009c0:	14000048 	b	400ae0 <main+0x454>
  4009c4:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4009c8:	91012000 	add	x0, x0, #0x48
  4009cc:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009d0:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  4009d4:	11000402 	add	w2, w0, #0x1
  4009d8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  4009dc:	91012000 	add	x0, x0, #0x48
  4009e0:	b9802fa1 	ldrsw	x1, [x29, #44]
  4009e4:	b8217802 	str	w2, [x0, x1, lsl #2]
  4009e8:	1400003e 	b	400ae0 <main+0x454>
  4009ec:	b9402fa0 	ldr	w0, [x29, #44]
  4009f0:	11000400 	add	w0, w0, #0x1
  4009f4:	b9002fa0 	str	w0, [x29, #44]
  4009f8:	b9402fa0 	ldr	w0, [x29, #44]
  4009fc:	7100201f 	cmp	w0, #0x8
  400a00:	5400070c 	b.gt	400ae0 <main+0x454>
  400a04:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400a08:	91012000 	add	x0, x0, #0x48
  400a0c:	b9802fa1 	ldrsw	x1, [x29, #44]
  400a10:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400a14:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400a18:	9133c000 	add	x0, x0, #0xcf0
  400a1c:	2a0103e3 	mov	w3, w1
  400a20:	b9402fa2 	ldr	w2, [x29, #44]
  400a24:	52800781 	mov	w1, #0x3c                  	// #60
  400a28:	97fffed2 	bl	400570 <printf@plt>
  400a2c:	b9402fa0 	ldr	w0, [x29, #44]
  400a30:	51000401 	sub	w1, w0, #0x1
  400a34:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400a38:	91012000 	add	x0, x0, #0x48
  400a3c:	93407c21 	sxtw	x1, w1
  400a40:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  400a44:	7100201f 	cmp	w0, #0x8
  400a48:	54000221 	b.ne	400a8c <main+0x400>  // b.any
  400a4c:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400a50:	91012000 	add	x0, x0, #0x48
  400a54:	b9802fa1 	ldrsw	x1, [x29, #44]
  400a58:	52800022 	mov	w2, #0x1                   	// #1
  400a5c:	b8217802 	str	w2, [x0, x1, lsl #2]
  400a60:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400a64:	91012000 	add	x0, x0, #0x48
  400a68:	b9802fa1 	ldrsw	x1, [x29, #44]
  400a6c:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400a70:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400a74:	9133c000 	add	x0, x0, #0xcf0
  400a78:	2a0103e3 	mov	w3, w1
  400a7c:	b9402fa2 	ldr	w2, [x29, #44]
  400a80:	528007e1 	mov	w1, #0x3f                  	// #63
  400a84:	97fffebb 	bl	400570 <printf@plt>
  400a88:	14000016 	b	400ae0 <main+0x454>
  400a8c:	b9402fa0 	ldr	w0, [x29, #44]
  400a90:	51000401 	sub	w1, w0, #0x1
  400a94:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400a98:	91012000 	add	x0, x0, #0x48
  400a9c:	93407c21 	sxtw	x1, w1
  400aa0:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  400aa4:	11000402 	add	w2, w0, #0x1
  400aa8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400aac:	91012000 	add	x0, x0, #0x48
  400ab0:	b9802fa1 	ldrsw	x1, [x29, #44]
  400ab4:	b8217802 	str	w2, [x0, x1, lsl #2]
  400ab8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400abc:	91012000 	add	x0, x0, #0x48
  400ac0:	b9802fa1 	ldrsw	x1, [x29, #44]
  400ac4:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400ac8:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400acc:	9133c000 	add	x0, x0, #0xcf0
  400ad0:	2a0103e3 	mov	w3, w1
  400ad4:	b9402fa2 	ldr	w2, [x29, #44]
  400ad8:	52800861 	mov	w1, #0x43                  	// #67
  400adc:	97fffea5 	bl	400570 <printf@plt>
  400ae0:	b94023a0 	ldr	w0, [x29, #32]
  400ae4:	7100001f 	cmp	w0, #0x0
  400ae8:	54000080 	b.eq	400af8 <main+0x46c>  // b.none
  400aec:	b9402fa0 	ldr	w0, [x29, #44]
  400af0:	7100201f 	cmp	w0, #0x8
  400af4:	54ffdfed 	b.le	4006f0 <main+0x64>
  400af8:	b94023a0 	ldr	w0, [x29, #32]
  400afc:	7100001f 	cmp	w0, #0x0
  400b00:	54000780 	b.eq	400bf0 <main+0x564>  // b.none
  400b04:	b9401fa0 	ldr	w0, [x29, #28]
  400b08:	11000400 	add	w0, w0, #0x1
  400b0c:	b9001fa0 	str	w0, [x29, #28]
  400b10:	b9401fa0 	ldr	w0, [x29, #28]
  400b14:	51000402 	sub	w2, w0, #0x1
  400b18:	528aaac0 	mov	w0, #0x5556                	// #21846
  400b1c:	72aaaaa0 	movk	w0, #0x5555, lsl #16
  400b20:	9b207c40 	smull	x0, w2, w0
  400b24:	d360fc01 	lsr	x1, x0, #32
  400b28:	131f7c40 	asr	w0, w2, #31
  400b2c:	4b000021 	sub	w1, w1, w0
  400b30:	2a0103e0 	mov	w0, w1
  400b34:	531f7800 	lsl	w0, w0, #1
  400b38:	0b010000 	add	w0, w0, w1
  400b3c:	4b000041 	sub	w1, w2, w0
  400b40:	7100003f 	cmp	w1, #0x0
  400b44:	54000080 	b.eq	400b54 <main+0x4c8>  // b.none
  400b48:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400b4c:	91362000 	add	x0, x0, #0xd88
  400b50:	14000003 	b	400b5c <main+0x4d0>
  400b54:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400b58:	91364000 	add	x0, x0, #0xd90
  400b5c:	b9401fa1 	ldr	w1, [x29, #28]
  400b60:	97fffe84 	bl	400570 <printf@plt>
  400b64:	52800020 	mov	w0, #0x1                   	// #1
  400b68:	b9002ba0 	str	w0, [x29, #40]
  400b6c:	1400000b 	b	400b98 <main+0x50c>
  400b70:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400b74:	91012000 	add	x0, x0, #0x48
  400b78:	b9802ba1 	ldrsw	x1, [x29, #40]
  400b7c:	b8617801 	ldr	w1, [x0, x1, lsl #2]
  400b80:	90000000 	adrp	x0, 400000 <_init-0x4f8>
  400b84:	91366000 	add	x0, x0, #0xd98
  400b88:	97fffe7a 	bl	400570 <printf@plt>
  400b8c:	b9402ba0 	ldr	w0, [x29, #40]
  400b90:	11000400 	add	w0, w0, #0x1
  400b94:	b9002ba0 	str	w0, [x29, #40]
  400b98:	b9402ba0 	ldr	w0, [x29, #40]
  400b9c:	7100201f 	cmp	w0, #0x8
  400ba0:	54fffe8d 	b.le	400b70 <main+0x4e4>
  400ba4:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400ba8:	91012000 	add	x0, x0, #0x48
  400bac:	b9401c00 	ldr	w0, [x0, #28]
  400bb0:	71001c1f 	cmp	w0, #0x7
  400bb4:	5400012c 	b.gt	400bd8 <main+0x54c>
  400bb8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400bbc:	91012000 	add	x0, x0, #0x48
  400bc0:	b9401c00 	ldr	w0, [x0, #28]
  400bc4:	11000401 	add	w1, w0, #0x1
  400bc8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400bcc:	91012000 	add	x0, x0, #0x48
  400bd0:	b9001c01 	str	w1, [x0, #28]
  400bd4:	14000005 	b	400be8 <main+0x55c>
  400bd8:	b0000080 	adrp	x0, 411000 <__libc_start_main@GLIBC_2.17>
  400bdc:	91012000 	add	x0, x0, #0x48
  400be0:	52800021 	mov	w1, #0x1                   	// #1
  400be4:	b9001c01 	str	w1, [x0, #28]
  400be8:	528000e0 	mov	w0, #0x7                   	// #7
  400bec:	b9002fa0 	str	w0, [x29, #44]
  400bf0:	b94023a0 	ldr	w0, [x29, #32]
  400bf4:	7100001f 	cmp	w0, #0x0
  400bf8:	54fff741 	b.ne	400ae0 <main+0x454>  // b.any
  400bfc:	52800140 	mov	w0, #0xa                   	// #10
  400c00:	97fffe60 	bl	400580 <putchar@plt>
  400c04:	52800000 	mov	w0, #0x0                   	// #0
  400c08:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400c0c:	d65f03c0 	ret

0000000000400c10 <__libc_csu_init>:
  400c10:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400c14:	910003fd 	mov	x29, sp
  400c18:	a901d7f4 	stp	x20, x21, [sp, #24]
  400c1c:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf264>
  400c20:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf264>
  400c24:	91374294 	add	x20, x20, #0xdd0
  400c28:	913722b5 	add	x21, x21, #0xdc8
  400c2c:	a902dff6 	stp	x22, x23, [sp, #40]
  400c30:	cb150294 	sub	x20, x20, x21
  400c34:	f9001ff8 	str	x24, [sp, #56]
  400c38:	2a0003f6 	mov	w22, w0
  400c3c:	aa0103f7 	mov	x23, x1
  400c40:	9343fe94 	asr	x20, x20, #3
  400c44:	aa0203f8 	mov	x24, x2
  400c48:	97fffe2c 	bl	4004f8 <_init>
  400c4c:	b4000194 	cbz	x20, 400c7c <__libc_csu_init+0x6c>
  400c50:	f9000bb3 	str	x19, [x29, #16]
  400c54:	d2800013 	mov	x19, #0x0                   	// #0
  400c58:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400c5c:	aa1803e2 	mov	x2, x24
  400c60:	aa1703e1 	mov	x1, x23
  400c64:	2a1603e0 	mov	w0, w22
  400c68:	91000673 	add	x19, x19, #0x1
  400c6c:	d63f0060 	blr	x3
  400c70:	eb13029f 	cmp	x20, x19
  400c74:	54ffff21 	b.ne	400c58 <__libc_csu_init+0x48>  // b.any
  400c78:	f9400bb3 	ldr	x19, [x29, #16]
  400c7c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400c80:	a942dff6 	ldp	x22, x23, [sp, #40]
  400c84:	f9401ff8 	ldr	x24, [sp, #56]
  400c88:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c8c:	d65f03c0 	ret

0000000000400c90 <__libc_csu_fini>:
  400c90:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400c94 <_fini>:
  400c94:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400c98:	910003fd 	mov	x29, sp
  400c9c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ca0:	d65f03c0 	ret
